The invention relates to a multiprogramming data processing system comprising a plurality of data processing devices interconnected by a common standard bus for transporting address signals and data signals, wherein each data processing device comprises:
(a) a local data processor having a first data port connected to the standard bus; PA0 (b) a local memory section having a second data port connected to the standard bus; PA0 (c) a local bus interconnecting the local data processor to the local memory section; PA0 (d) priority means for providing a local data processor with a privileged access to the associated local memory in preference over a memory access arriving over the standard bus; PA0 e. first detector means for selectively detecting during execution of a program segment therein a non-branch instruction, a first type branch instruction governing a branch within the current program segment, and a second type branch instruction governing a branch outside the current segment; PA0 f. second detector means for upon detection of a second type branch instruction selectively detecting a branch within the current program portion containing the program segment being executed and a portion changing branch to a second program portion differing from the current program portion and thereupon generating a portion changing interrupt signal while terminating the execution of the current program portion; PA0 g. execution request signalling means for upon generation of a portion changing interrupt signal accessing said waiting list means with a program execution request signal for the program containing the program portion thus terminated and a waiting list accessing signal for interrogating a waiting list item from its own waiting list.
the data processing system furthermore having an overall memory encompassing the aggregated local memories for storing respective program segments for any program to be executed. Such data processing systems or computer systems are products of the data processing industry.
The notion of a program segment is well-known; the division of a program into segments is executed by the programmer writing the program. The elements of a program segment are usually logically related, for example, in that all such elements are either user data items, or are all parameter values, or are all program code or instruction statements. Segments may be of equal or unequal lengths, while also a single category of elements, such as user data, may be distributed over different segments. The overall memory may encompass a relatively large shared memory of equal or lower operating speed in comparison to the respective local memories. The data processing system may comprise other devices such as input/output devices. The local data processors and/or local memory sections may have different capabilities. A distributed system of the kind described is suitable for parallel execution of a plurality of programs at a time. The stationary linkage of a specific program to one associated data processing device has several disadvantages. In the first place certain program segments may be used in several programs. For example, a certain set of code statements may be used with different sets of user data, while each set of user data must furthermore be processed by means of respective further sets of code statements. Now the memory capacity would be stressed if the common segment(s) were stored a plurality of times, each time at a respective one of the data processing devices. Furthermore, in case of a modification within a common segment, the uniqueness of the content would be destroyed. Alternatively, if a common segment were stored only once, frequent access thereto via the standard bus would be detrimental to processing speed. Furthermore the capacity of one local memory would readily be insufficient to store all segments of one long program. Finally such stationary linkage would be quite unflexible.